作者:wogoyixikexie@gliet
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MMU的大名,,早就聽(tīng)說(shuō)了,,可是一直不知道它是怎么工作的,前幾月貌似看的模模糊糊,,現(xiàn)在快年關(guān)了,,來(lái)做個(gè)了結(jié)。在文中我會(huì)大量引用英文,,并且不做翻譯,,因?yàn)榘秤X(jué)得我的英文水平會(huì)誤解別人,。O(∩_∩)O哈哈~
One of the key services provided by an MMU is the ability to manage tasks as indepen-dent programs running in their own private memory space. A task written to run under the control of an operating system with an MMU does not need to know the memory
requirements of unrelated tasks. This simpli?es the design requirements of individual tasks running under the control of an operating system.
——給每個(gè)任務(wù)提供獨(dú)立的運(yùn)行空間,。
The MMU simpli?es the programming of application tasks because it provides the resources needed to enable virtual memory—an additional memory space that is indepen-dent of the physical memory attached to the system. The MMU acts as a translator, which
converts the addresses of programs and data that are compiled to run in virtual memory to the actual physical addresses where the programs are stored in physical main memory.This translation process allows programs to run with the same virtual addresses while being
held in different locations in physical memory.——MMU作為一個(gè)轉(zhuǎn)換器,。程序可以運(yùn)行在同一塊虛擬內(nèi)存,而各自存儲(chǔ)在不同的物理內(nèi)存,。
We begin with a review of the protection features of an MPU and then present the additional features provided by an MMU. We introduce relocation registers, which hold the conversion data to translate virtual memory addresses to physical memory addresses,
and the Translation Lookaside Buffer (TLB), which is a cache of recent address relocations.We then explain the use of pages and page tables to con?gure the behavior of the relocation registers.
——這里介紹重定位寄存器,,它保存轉(zhuǎn)換虛擬地址到物理地址的數(shù)據(jù);介紹旁路緩沖器(TLB),,它是存放最近的的地址重定位信息的cache(高速緩存),;介紹如是使用頁(yè)和頁(yè)表來(lái)重新配置重定位寄存器。
We then discuss how to create regions by con?guring blocks of pages in virtualmemory .We end the overview of the MMU and its support of virtual memory by showing how tomanipulate the MMU and page tables to support multitasking.
——討論通過(guò)虛擬內(nèi)存中的塊頁(yè)表來(lái)配置來(lái)創(chuàng)建區(qū)域,。最后演示使用虛擬內(nèi)存來(lái)支持和創(chuàng)建多任務(wù)操作系統(tǒng)
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現(xiàn)在來(lái)看看這個(gè)MMU到底有什么東西,,有什么特備的硬件結(jié)構(gòu)
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To permit tasks to have their own virtual memory map, the MMU hardware performs address relocation, translating the memory address output by the processor core before it reaches main memory. The easiest way to understand the translation process is to imagine
a relocation register located in the MMU between the core and main memory.——地址重定位寄存器,其實(shí)就是地址轉(zhuǎn)換器
Figure 14.1 shows an example of a task compiled to run at a starting address of 0x4000000 in virtual memory. The relocation register translates the virtual addresses ofTask 1 to physical addresses starting at 0x8000000.
A second task compiled to run at the same virtual address, in this case 0x400000, can be placed in physical memory at any other multiple of 0x10000 (64 KB) and mapped to 0x400000 simply by changing the value in the relocation register.
——為什么一定要是64KB為倍數(shù)的的地址的物理存儲(chǔ)器上,?難道這個(gè)是MMU有什么特殊的硬件結(jié)構(gòu)決定了?
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A single relocation register can only translate a single area of memory, which is set by
the number of bits in the offset portion of the virtual address. This area of virtual memory
is known as a page. The area of physical memory pointed to by the translation process is
known as a page frame.——頁(yè)和頁(yè)幀
———————————————上面虛擬內(nèi)存的轉(zhuǎn)換過(guò)程了———————————————
The set of relocation registers that temporarily store the translations in an ARM MMU
are really a fully associative cache of 64 relocation registers. This cache is known as a
Translation Lookaside Buffer (TLB). The TLB caches translations of recently accessed pages.
——重定位寄存器是由64個(gè)重定位寄存器cache相連成的,,這個(gè)cache被稱為旁路緩沖器(TLB),它緩存最近訪問(wèn)頁(yè)轉(zhuǎn)換的數(shù)據(jù),?!?strong>我覺(jué)得是地址數(shù)據(jù)才對(duì),因?yàn)锳RM9是數(shù)據(jù)總線和地址總線分離的,。
In addition to having relocation registers, theMMUuses tables inmainmemory to store
the data describing the virtualmemorymaps used in the system. These tables of translation
data are known as page tables. An entry in a page table represents all the information needed
to translate a page in virtual memory to a page frame in physical memory.
——除了使用重定位寄存器外,,MMU還使用在主存中的表來(lái)存放描述虛擬內(nèi)存映射的數(shù)據(jù),這個(gè)表被稱為頁(yè)表,。
而頁(yè)表的每個(gè)子表存儲(chǔ)了一個(gè)頁(yè)轉(zhuǎn)換到物理存儲(chǔ)器的一個(gè)頁(yè)幀所需要的信息,。
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Apage table entry (PTE) in a page table contains the following information about a virtual
page: the physical base address used to translate the virtual page to the physical page frame,
the access permission assigned to the page, and the cache and write buffer con?guration for
the page. If you refer to Table 14.1, you can see that most of the region con?guration data
in an MPU is now held in a page table entry. This means access permission and cache and
write buffer behavior are controlled at a granularity(粒度) of the page size, which provides ?ner
control over the use of memory. Regions in an MMU are created in software by grouping
blocks of virtual pages in memory.——MMU區(qū)域由在內(nèi)存中的虛擬頁(yè)的塊群以軟件方法創(chuàng)建
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Since a page in virtual memory has a corresponding (連續(xù)的)entry (條目)in a page table, a block of
virtual memory pages map to a set of sequential entries in a page table. Thus, a region can
be de?ned as a sequential set of page table entries. The location and size of a region can be
held in a software data structure while the actual translation data and attribute information
is held in the page tables.
Figure 14.3 shows an example of a single task that has three regions: one for text, one
for data, and a third to support the task stack. Each region in virtual memory is mapped
to different areas in physical memory. In the ?gure, the executable code is located in ?ash
memory, and the data and stack areas are located in RAM. This use of regions is typical of
operating systems that support sharing code between tasks.——操作系統(tǒng)就是這么設(shè)計(jì)的?
With the exception of the master level 1 (L1) page table, all page tables represent 1 MB
areas of virtual memory. If a region’s size is greater than 1 MB or crosses over the 1 MB
boundary addresses that separate page tables, then the description of a region must also
include a list of page tables. The page tables for a region will always be derived from
sequential page table entries in the master L1 page table. However, the locations of the L2
page tables in physical memory do not need to be located sequentially. Page table levels are
explained more fully in Section 14.4.
——難道在wince中的OEMAddresstable中的虛擬內(nèi)存大小都是1M的倍數(shù),,且是連續(xù)
的是由此而來(lái),?(其實(shí)wince可以使用不連續(xù)的,,不過(guò)要使用特殊技巧才行)
在物理內(nèi)存中的頁(yè)表可以是非連續(xù)的,?!獌?yōu)龍的bootloader就有此見(jiàn)證!
看看下圖
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MMU是如何實(shí)現(xiàn)多任務(wù)調(diào)度的?
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Page tables can reside inmemory and not bemapped toMMU hardware. One way to build
amultitasking system is to create separate sets of page tables, each mapping a unique virtual
memory space for a task. To activate a task, the set of page tables for the speci?c task and
its virtual memory space are mapped into use by theMMU. The other sets of inactive page
tables represent dormant tasks. This approach allows all tasks to remain resident in physical
memory and still be available immediately when a context switch occurs to activate it.
——頁(yè)表可以駐留在內(nèi)存中,,不必映射到MMU硬件,。構(gòu)建多任務(wù)的一種方法是創(chuàng)建一批
獨(dú)立的頁(yè)表,,每個(gè)映射到唯一的任務(wù)空間,。為了激活某個(gè)任務(wù),,對(duì)應(yīng)這個(gè)任務(wù)的那組頁(yè)表
和其虛擬內(nèi)存空間由MMU使用,,沒(méi)有激活的頁(yè)表代表睡眠的任務(wù)。這種方法使所有的任務(wù)
可以駐留在內(nèi)存中,,當(dāng)發(fā)生上下文切換的時(shí)候可以立即使用。
By activating different page tables during a context switch, it is possible to execute
multiple tasks with overlapping virtual addresses. The MMU can relocate the execution
address of a task without the need to move it in physical memory. The task’s physical
memory is simply mapped into virtual memory by activating and deactivating page tables.
——在上下文切換時(shí)候通過(guò)激活不同的頁(yè)表,,使得在重疊的虛擬地址執(zhí)行多任務(wù)
成為可能。MMU可以通過(guò)重定位任務(wù)地址而不需要移動(dòng)在內(nèi)存中的任務(wù),。任務(wù)的
物理內(nèi)存只是簡(jiǎn)單的通過(guò)激活與不激活頁(yè)表來(lái)實(shí)現(xiàn)映射到虛擬內(nèi)存
——My GOD!明白MMU的工作原理了?。。,。,。,。。,。,。?/font>
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When the page tables are activated or deactivated, the virtual-to-physical address map-
pings change. Thus, accessing an address in virtual memory may suddenly translate to a
different address in physical memory after the activation of a page table. As mentioned in
Chapter 12, the ARM processor cores have a logical cache and store cached data in virtual
memory. When this translation occurs, the caches will likely contain invalid virtual data
from the old page table mapping. To ensure memory coherency, the caches may need
cleaning and ?ushing. The TLB may also need ?ushing because it will have cached old
translation data.——注意清理和清除cache哦
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The effect of cleaning and ?ushing the caches and the TLB will slow system operation.
However, cleaning and ?ushing stale (陳舊的,,過(guò)時(shí)的)code or data from cache and stale translated physical
addresses from the TLB keep the system from using invalid data and breaking.
——雖然清理和清除cache和TLB會(huì)導(dǎo)致系統(tǒng)運(yùn)行變慢,但是清理和清除cache中過(guò)時(shí)的代碼數(shù)據(jù),,
或者過(guò)時(shí)的物理地址,,可以避免系統(tǒng)使用無(wú)效的數(shù)據(jù)而崩潰。
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During a context switch, page table data is not moved in physical memory; only pointers
to the locations of the page tables change.——任務(wù)切換如下步驟,。
To switch between tasks requires the following steps:
1. Save the active task context and place the task in a dormant state.
2. Flush the caches; possibly clean the D-cache if using a writeback policy.
3. Flush the TLB to remove translations for the retiring task.
4. Con?gure the MMU to use new page tables translating the virtual memory execution
area to the awakening task’s location in physical memory.
5. Restore the context of the awakening task.
6. Resume execution of the restored task.
Note: to reduce the time it takes to perform a context switch, a writethrough cache
policy can be used in the ARM9 family. Cleaning the data cache can require hundreds of
writes to CP15 registers. By con?guring the data cache to use a writethrough policy, there is
no need to clean the data cache during a context switch, which will provide better context
switch performance. Using a writethrough policy distributes these writes over the life of
the task. Although a writeback policy will provide better overall performance, it is simply
easier to write code for small embedded systems using a writethrough policy.
——使用文件系統(tǒng)的應(yīng)該使用會(huì)寫(xiě)策略,這樣效率較高,。
++++++++++++++++++++++為什么虛擬內(nèi)存和物理內(nèi)存映射是要固定的,?===========
Typically, page tables reside in an area of main memory where the virtual-to-physical
address mapping is ?xed. By “?xed,” we mean data in a page table doesn’t change during
normal operation, as shown in Figure 14.5. This ?xed area of memory also contains the
operating system kernel and other processes. The MMU, which includes the TLB shown
in Figure 14.5, is hardware that operates outside the virtual or physical memory space; its
function is to translate addresses between the two memory spaces.
——在運(yùn)行系統(tǒng)時(shí)候不能改變兩者的映射,否則很容易出錯(cuò),,wince是這樣的,,
不知道linux是怎么樣的了,ADS 下的bootloader也是這樣的,。
————————————————方框的是固定映射————————————
參考資料
ARM System Developer's Guide: Designing and Optimizing System Software
——ARM System Developer's Guide: Designing and Optimizing System Software——ARM嵌入式系統(tǒng)開(kāi)發(fā):軟件設(shè)計(jì)與優(yōu)化的英文原版——我個(gè)人感覺(jué)這是國(guó)內(nèi)翻譯ARM書(shū)籍最好的一本之一,,比杜XX的ARM體系結(jié)構(gòu)與 編程好千倍。 本書(shū)雖然說(shuō)軟件設(shè)計(jì)與優(yōu)化,,但是講的硬件也很多,,比如MMU和cache等,講的精彩紛呈:我剛才想寫(xiě)關(guān)于MMU和cache的博客,,發(fā)現(xiàn)太龐大,,看來(lái)這 段時(shí)間要重新看看這本書(shū)才能寫(xiě)。
下載地址:http://download.csdn.net/source/904273
ARM920T Technical Reference Manual——不多說(shuō)了,,想了解2440等的bootloader的人一定要看這個(gè)東西了,,一些協(xié)處理器指令講的很詳細(xì)
下載地址:http://download.csdn.net/source/903240
ARM Architecture Reference Manual(2nd Edition) ——比較有價(jià)值的英文ARM書(shū)籍
下載地址http://download.csdn.net/source/901433
轉(zhuǎn)載請(qǐng)標(biāo)明:作者wogoyixikexie@gliet.桂林電子科技大學(xué)一系科協(xié),原文地址:http://blog.csdn.net/gooogleman——如有錯(cuò)誤,,希望能夠留言指出;如果你有更加好的方法,,也請(qǐng)?jiān)诓┛秃竺媪粞裕視?huì)感激你的批評(píng)和分享,。